core:simd
Type-safe wrappers over the WebAssembly 128-bit SIMD instruction set.
All types are newtypes of the primitive v128 and can be freely reinterpreted via as cast.
Types
| Category | Types |
|---|---|
| Signed integer | i8x16, i16x8, i32x4, i64x2 |
| Unsigned integer | u8x16, u16x8, u32x4, u64x2 |
| Floating-point | f32x4, f64x2 |
Construction
T::splat(value)— broadcast a scalar to all lanes- Tuple literal coercion —
let v: i32x4 = [1, 2, 3, 4]; - Bitwise reinterpret —
let u = signed as u32x4;
Lane Access
extract_lane(index)— returns the lane value (i32/i64/f32/f64 depending on type)extract_lane_s(index)/extract_lane_u(index)— sign/zero-extended extraction for sub-32-bit types (i8x16, i16x8)
Byte Selection
swizzle(indices) picks each byte of one vector by a runtime index, zeroing
an index of 16 or more. To pick from two vectors, or to pick at no runtime
cost, use builtin::i8x16_shuffle(l0, ..., l15, a, b): 0..=15 names a byte
of a and 16..=31 a byte of b. Its sixteen indices are Wasm immediates,
so they must be written as literals at the call — a method could not carry
them until const generic parameters land.
Operators
All types support +, -, *, &, |, ^, ~, <<, >>, and unary -.
Floating-point types additionally support /. Integer types do not support /.
Comparison Methods
All types provide eq, ne, lt, gt, le, ge.
These return a mask vector (all-1s or all-0s per lane), not bool.
Floating-point comparisons return the corresponding integer mask type (f32x4 -> i32x4).
Signed Integer Types (i8x16, i16x8, i32x4, i64x2)
Common methods: abs, all_true, bitmask, bitselect.
i8x16 specific: swizzle, add_sat_s/u, sub_sat_s/u, min_s/u, max_s/u,
avgr_u, narrow_i16x8_s/u, popcnt, any_true, andnot.
i16x8 specific: add_sat_s/u, sub_sat_s/u, min_s/u, max_s/u, avgr_u,
narrow_i32x4_s/u, extend_low/high_i8x16_s/u, extmul_low/high_i8x16_s/u,
extadd_pairwise_i8x16_s/u, q15mulr_sat_s.
i32x4 specific: min_s/u, max_s/u, dot_i16x8_s,
extend_low/high_i16x8_s/u, extmul_low/high_i16x8_s/u,
extadd_pairwise_i16x8_s/u, trunc_sat_f32x4_s/u, trunc_sat_f64x2_s/u_zero.
i64x2 specific: extend_low/high_i32x4_s/u, extmul_low/high_i32x4_s/u.
Unsigned Integer Types (u8x16, u16x8, u32x4, u64x2)
u8x16: swizzle, relaxed_swizzle, abs, add_sat, sub_sat, min,
max, avgr, all_true, bitmask, popcnt, bitselect.
u16x8: abs, add_sat, sub_sat, min, max, avgr,
all_true, bitmask, bitselect.
u32x4: min, max, all_true, bitmask, bitselect.
u64x2: all_true, bitmask, bitselect.
Floating-Point Types (f32x4, f64x2)
sqrt, abs, min, max, ceil, floor, trunc, nearest, pmin, pmax, bitselect.
f32x4 specific: convert_i32x4_s/u, demote_f64x2_zero.
f64x2 specific: convert_low_i32x4_s/u, promote_low_f32x4.
Relaxed SIMD
Relaxed SIMD operations trade strict determinism for performance.
Edge-case behavior (NaN, out-of-range) is host-defined, and fixed on one host.
Methods use the relaxed_ prefix.
- FMA:
f32x4/f64x2.relaxed_madd(b, c)(a_b+c),relaxed_nmadd(b, c)(-(a_b)+c) - Min/Max:
f32x4/f64x2.relaxed_min/max(faster, NaN behavior varies) - Truncation:
i32x4::relaxed_trunc_f32x4_s/u,relaxed_trunc_f64x2_s/u_zero - Lane select:
i8x16/i16x8/i32x4/i64x2.relaxed_laneselect - Swizzle:
i8x16.relaxed_swizzle(out-of-range indices host-defined) - Q15 multiply:
i16x8.relaxed_q15mulr_s - Dot product:
i16x8.relaxed_dot_i8x16_i7x16_s,i32x4.relaxed_dot_i8x16_i7x16_add_s
Synopsis
let a: i32x4 = [10, 2, 30, 4];
let b: i32x4 = [1, 20, 3, 40];
let mins = a.min_s(&b);
assert mins.extract_lane(0) == 1;
assert mins.extract_lane(3) == 4;